Figure 8 shows a 7-segment decoder module that has the three-bit input c2c1co. T

Question

Figure 8 shows a 7-segment decoder module that has the three-bit input c2c1co. This decoder produces seven outputs that are used to display a character on a 7-segment display. Table 1 lists the characters that should be displayed for each valuation of c2c1co. To keep the design simple, only four characters are included in the table (plus the 'blank' character, which is selected for codes 100 - 111) The seven segments in the display are identified by the indices 0 to 6 shown in the figure. Each segment is illuminated by driving it to the logic value 0. You are to write a Verilog module that implements logic functions that represent circuits needed to activate each of the seven segments. Use only simple Verilog assign statements in your code to specify each logic function using a Boolean expression I-segment decoder 4 Figure 8. A 7-segment decoder C2ciC0Character 001 010 011 100 101 110 Table 1. Character codes Perform the following steps 1. Create a new Quartus II project for your circuit

Explanation / Answer

/Verilog module.
module segment7(
bcd,
hex0
);

input [3:0] bcd;
output [6:0] hex0;
reg [6:0] hex0;

always @(bcd)
begin
case (bcd) //case statement
0 : hex0 = 6'b0000001;
1 : hex0 = 6'b1001111;
2 : hex0 = 6'b0010010;
3 : hex0 = 6'b0000110;
4 : hex0 = 6'b1001100;
5 : hex0= 6'b0100100;
6 : hex0 = 6'b0100000;
7 : hex0 = 6'b0001111;
8 : hex0 = 6'b0000000;
9 : hex0 = 6'b0000100;
default : hex0 = 6'b1111111;
endcase
end
  
endmodule

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