Fictions: 1,2,4,7 The goal of this laboratory project is to design and implement

Question

Fictions: 1,2,4,7 The goal of this laboratory project is to design and implement digital combinational circuits using VHDL on the Nexys4 FPGA board. The output of the circuit is a function of the input as shown in the table below. The board's slider switches will be used as input to the circuit, and LEDs will be utilized to display the outputs of the circuits to demonstrate proper functionality. Each student is required to create four separate digital circuits of their function; 1) NAND/NAND, 2) NOR/NOR, 3) 3x8 Decoder with OR, and 4) 4x1 Multiplexer (MUX) implementations (see attached for your parameters). Successful completion of the lab will require the following tasks: Using truth tables, K-Maps and Boolean algebra as necessary to derive the necessary circuit forms. Creating the appropriate circuits with VHDL code and saving it within the Xilinx ISE 14.7 (your ckt.vhd) Mapping the switches to the input variables, and the LEDs to the output variables using a user constraints file (.ucf). Creating a.bit file for the FPGA and instantiating it using the Digilent Adept software tool. Testing to ensure that your circuit works as requi Students will demonstrate their projects in Lab 272 for the instructor or a lab assistant before the due date. . Deliverables with this page as cover sheet: VHDL (.vhd) file [10 points] r constraint file (ucf. [10 pointsl K-maps and Boolean algebra [10 points] Truth Table Verification Chart 10 points Live demonstration 10 pointsl INPUT OUTPUT INANDNAND NOR/NOR MUX 0 0 0 0 0 0 0

Explanation / Answer

NAND              NOR                               Decoder      

1                       1    (000)                          D0     D1    D2   D3 D4   D5   D6 D7

1                        0   (001)                          1      0     0    0    0    0    0    0                (000)

1                        0    (010)                          0    1     0    0    0    0    0    0                (001)

1                        0     (011)                         0     0    1    0    0     0    0    0               (010)

1                        0     (100)                         0      0    0    1    0     0    0    0               (011)

1                        0      (101)                        0      0    0    0    1     0    0    0               (100)

1                       0       (110)                        0     0    0     0    0    1    0    0              (101)

0                         0         (111)                    0      0     0     0    0    0   1    0              (110)

                                                          0       0     0    0    0     0    0   1              (111)

Multiplexor  

S1 S2 S3

0 0 0                 S1' S2' S3'

0 0 1                 S1' S2' S3

0 1 0                 S1' S2   S3'

0 1 1                 S1' S2   S3

1 0 0                 S1    S2' S3'

1 0 1                S1    S2'    S3

1 1 0                S1   S2    S3'

1 1 1                S1   S2    S3

Y = S1' S2' S3' + S1' S2' S3 + S1' S2   S3' + S1    S2' S3' + S1    S2'    S3 + S1   S2    S3' + S1   S2    S3

Boolean expression of NAND = (AB)'

Boolean expression of NOR = (A+B)'

here " ' " this sign has been used to show complement.

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