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1. Build an Encoder and simulate your encoder. Be sure you have an enable on you

ID: 3569225 • Letter: 1

Question

1. Build an Encoder and simulate your encoder. Be sure you have an enable on your encoder. This is very important for your overall design. Build a part for the encoder. There is no need for a priority encoder, do not build one.

2. Build a parallel load data register. Use T-Flip flops for this register built from part 74107. DO NOT USE YOUR REGISTER FROM LAB 5. Simulate your register. Build the part for your register.

3. A clock is used to ensure your interrupt timing is correct. Design a count up/down counter to control the timing of your circuit. Your counter should have a control line that specifies whether it is counting up and down. Be sure you show that it both counts up and down. The counter generates the timing for to reset thereset and enable the encoder. Your register should hold the output value of the encoder for a count of 5 (Example: 0-4 is a count of 5) from the time the value of the interrupt is loaded into the register. There are many ways to do this so again there is no single correct answer. I strongly recommend finding the most efficient way to do it.

This lab is intended to simulate what happens when an interrupt is
detected by an M68000 micro-processor. An interrupt arrives on
designated interrupt lines at the CPU and that information is placed in a
register. The interrupt is held in the register for a pre-determined
period of time, during which the Operating System will handle the
interrupt. After this, the register holding the interrupt value is cleared
and the processor is ready to deal with another interrupt.
Problem statement:
Build a circuit which simulates the actions described above. Start with
an encoder. For this lab, the encoder will indicate which of the inputs
(1-3) is high. This value on the output of the encoder will be loaded
into a register (parallel-load). While the register is not zero, the
encoder cannot process another value and no other value can be
placed in the register until the register is cleared. Once the register is
cleared it can accept another value. The encoder must also be able to
process another input at this time.

Explanation / Answer

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