We have the following set-up: • 256 byte main memory • words are aligned (that i

Question

We have the following set-up:

• 256 byte main memory
• words are aligned (that is, they have an address divisible by 4)
• addresses are 8 bits
• 64 byte cache that uses direct-mapping
• each line of cache is 8 bytes
• first word in a line has an address divisible by 8

Show what happens in the cache by creating a table with the headings address tag line index valid hit/miss range of addresses to copy for the memory addresses

12, 13, 14, 31, 32, 122, 78, 12

The address, line index, and address range values should be in base-10; the tag should be in binary. In the last column of the table, the possible values should be
(a) if the appropriate line of the cache has not been given values, then give the range of memory addresses to copy to cache, e.g., 12-15
(b) use current values in cache
(c) if the appropriate line of the cache is being used, then give the range of memory addresses to copy to cache and indicate it is a replacement, e.g., 4-7 (replace)

For example, I get the following for the first line:

I don't need assembly code for this, just a table with the corresponding values.

address tag line index valid hit/miss range of address to copy 12 00 1 N, set miss 8-15

Explanation / Answer

Since each line is 8byte wide, and the total cache size is 64byte, we can say that there are 8 lines in the cache!

And since each line address is divisible by 8, the block offset is 3 bit.

So we have:
   block offset: 3bit
   line number: 3bit
   tag:          2bit

So:

As you can see the line number is given in binary, According to your need please change it to decimal.

address tag line index valid hit/miss range of address to copy 12 0 0 0 0 1 No miss 8 - 15 13 0 0 0 0 1 Yes hit use current value 14 0 0 0 0 1 Yes hit use current value 31 0 0 0 1 1 No Miss 24 - 31 32 0 0 1 0 0 No Miss 32 - 39 122 0 1 1 1 1 No Miss 120 - 127 78 0 1 0 0 1 Yes Miss 72 - 79 12 0 0 0 0 1 Yes Miss 8 - 15

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