Final A ITEC 625 Spring 2017 1 Parallel communication is impractical for long ha
ID: 3820567 • Letter: F
Question
Final A
ITEC 625 Spring 2017
1 Parallel communication is impractical for long haul communication because of ___________ and _____________.issues.
2. Research Question: In the lc3 how many LOAD instructions are used in lc3 Instruction set architecture..
3. Superscalar architectures can execute more than ______________ __________ at a time.
4. Encode -13 into an 8 bit 2’s complement binary integer.
5. Encode -13 into an 8 bit signed binary integer.
6. Encode -13 into a 1’s complement binary integer.
7. Two alternatives to using Programmed I/O in a computer architecture _______________ and ______________/
8. A parity bit is added to every ___________.
9. a Steaming image of a file looks most closely like the ___________ _________ representation of the file.
10. The internal level of a data base describes the ______________architecture of the data base.
11. Embedded operating systems are often known as ____________________ operating systems.
12. After system boot what part of an operating system must always be memory resident ___________________
13. Research Question: Investigate the lc3 microcomputer. What type of I/O does this 16 bit micro use ________________
14. What is the fastest memory in every computer system _________________.
15. Human interface functions like GUIs and File management systems are not needed in ___________applications
16. Memory that a relatively long distance from the CPU is usually _______________ but ___________.
17. Encode the mixed fraction -3 1/32 as an IEEE floating point binary value.
18. When the CPU; receives an interrupt it polls devices on the basis of ____________________.
19. What technology is used to store large amounts of data very securely for many years _____________
20. What is the base 10 value of the one’s complement binary integer 1110 1110?
21. An ____________________computer is programmed using jumper wires,
22. The ALU is used to perform ______________ ________________
23. Research Question:… A ___________circuit is a pre-planned route between CPUs that is established for ALL packets in a packet switched network.
24. DMA devices access _______________ directly.
25. The control unit is used to determine the _________________of instruction execution.
Explanation / Answer
1) Cost of cable and synchronization issues
2) Three : pc relative mode , base+offset mode, memory indirect mode
3) one instruction
4) 11110011
5) 10001101
6) 01110010
7) Interrupt I/O and DMA (Direct Memory Access)
8) Block of Data
9) gray scale
10) physical storage structure
11) Real-time
12) Kernel
13) MemoryMapped I/O
14) Register
15) embedded
16)
17) 11000000010000011111101111100111
18) daisy chaining
19) cloud
20) 17
21) embedded system oprtaing
22) arithmatic operations
23) virtual
24) memory
25) order
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