Define: PC, IR, MAR, MBR, SR, datapath, machine instructions, instruction cycle,

Question

Define:

PC, IR, MAR, MBR, SR, datapath, machine instructions, instruction cycle, operation decoding, assembly language programming, instruction format.

Why is microprogrammed control better than hardwired control? Identify some situations when hardwired is preferred. Why is hardwired control better than microprogrammed control?

What is a control store?

What is a micro-sequencer?

What is Moore’s Law? What does it imply?

What is an addressing mode? Why should different/multiple addressing modes be provided?

What are the 4 classes of addressing modes our textbook discusses?

What are the 4 general characteristics of a computer system that need to be taken into consideration when performing instruction set design?

In general, instructions of an instruction set can be divided into a number of categories based on their basic operations. How many categories dose our textbook discussed? What are these categories? For each category, provide a brief description.

Define RISC and CISC. What are the main issues of RISC/CISC debates? Compare and contrast RISC and CISC.

What are the advantages and disadvantages of RISC architectures? Provide a list of main features (at least 5) of RISC architecture.

Give AT LEAST 5 examples of where RISC architecture is used. Find out about what processors are inside some of the popular favorite electronic devices (e.g., game consoles, cell phones, MP3 players, etc.), for example, Apple iPods, Apple iPhone, Nintendo Game Boy Advance, PlayStaion 4 Game Console.

Explanation / Answer

Program counter(PC): it provides the memory location of the next instruction that is to be executed.

Instruction register(IR): it holds the instruction which is being executed currently.

Memory address register(MAR) and Memory buffer register(MBR): MAR is used for address bus and MBR is used for the data bus.

Machine instructions: CPU operations are determined by the set of instructions being executed,thus it is referred to as machine instruction.

It includes the following instructions:

Ooperation code: it tells about the type of operation that is to be performed such as add,move,sub,etc.

Source operand reference: it involves one or more operands which are nothung but inputs for the operation.

Result operand reference: this helps in producing the result.

Next instruction reference: this tells the CPU,when to fetch the next instruction after the execution of the current instruction.

Instruction cycle: it is a process by which the program instructions are retrieved fromthe memory by the computer and also determines the actions need to be performed by the instructions.

The circuits used are:

Steps :

Datapath: it is a collection of functional units like ALU’S that perform data processing operations,buses,registers. It composes the CPU along with the control unit.

Assembly language programming: it is a low-level programming language in which there is a strong correspondence between the language and architecture’s machine code instructions.

Instruction format: it includes an opcode either explicitly or implicitly and zero or more operands. The explicitly given operands are referenced using the address modes available for the machine.

Operation decoding: the set of fetched instructions from the memory ar decoded here.

Microprogrammed control and hardwired control: it generates control signals by using a memory control storage called which contains the control signals. While hardwired control generates control signals by using finite state machines.But microprogrammed control is given more preference because of it’s advantage to CISC machines as there is a need of systemtic development of control signals.

Hardwired control can be preferable because of the away it uses microinstruction-register and control stage address register together as a state register.

Control store: it stores the CPU’s microprogram and is accessed by a microsequencer.

Microsequencer: it generates th eaddresses used to step through the mocroprogramof a control store.it is used as a part of a CPU as generator for address ranges.

Moore’s law:

Addressing modes: they are a part of the instruction set architecture in CPU designs.these addressing modes define how machine language instructions in the architecture identify the operands of each instruction.

RISC AND CISC:

But the general differences are:
CISC - larger, more feature-rich instruction set such as more operations, addressing modes, etc and slower clock speeds and fewer general purpose registers. Examples: x86 variants

RISC - smaller, simpler instruction set, faster clock speeds, more general purpose registers. Examples: MIPS, Itanium, PowerPC

other differences:
An equivalent program implemented in CISC will most likely be shorter than a program implemented in RISC .

RISC CPUs run at faster clock speeds than CISC because max clock period is given by the slowest step of the pipeline .

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