1w $r2, 0($r4) 1w $r3, 4($r4) addi $r4, $r4, 4 add $r10, $r10, $r9 add $r2, $r3,

Question

1w $r2, 0($r4) 1w $r3, 4($r4) addi $r4, $r4, 4 add $r10, $r10, $r9 add $r2, $r3, $r2 sw $r2, -4($r4) (a) Fill in every value on the datapath in cycle 5 of execution. Assume that the IF stage of the first instruction (lw) executes in cycle 1 and assume that its address in instruction memory is 0x0000. Before execution begins, each register's value is the same as its register value (e.g. r1 is 1, r9 is 9). The value in memory is the same as the address plus 100 (e.g. address 60 holds the value 160). Draw the values on the figure below. To clarify, you must write the value of the black wires for any wire that is (or will be) chosen by a MUX, that does not only feed directly into a control block, and whose value is not formally written in the diagram. (b) What are the control signals consumed (that are currently used) in cycle 5 of execution?

Explanation / Answer

The processor's instructions are:

sw and beq are the only instructions that do not write any registers. lw and sw are the only instructions that use the constant field. They also depend on the ALU to compute the effective memory address. ALUOp for R-type instructions depends on the instructions’ func field. The PCSrc control signal (not listed) should be set if the instruction is beq and the ALU’s Zero output is true.

pcsrc branch regwrite regdst alusrc aluop memwrite memread memtoreg 1 add 1 1 0 010 0 0 0 2 sub 1 1 0 110 0 0 0 3 and 1 1 0 000 0 0 0 4 or 1 1 0 001 0 0 0 5 slt 1 1 0 111 0 0 0 6 lw 0 1 1 010 0 1 1 7 sw x 0 1 010 1 0 x 8 beg x 0 0 110 0 0 x

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