Please show all steps! Thanks Given: VDD = VSS = 15.0V, R1 = 260kOhm, R2 = 390kO

Question

Please show all steps! Thanks

Given: VDD = VSS = 15.0V, R1 = 260kOhm, R2 = 390kOhm, RD = 32kOhm, Rs = 4kOhm. Vt = -1.0V, =62.5Mu A/V2, W = 16 Mum, L = 9 Mum, lambda = 0 V-1. Find: Find the DC bias state, VDS and ID. With R1, R2 and RS fixed, as given, what range of values of RD will result in Saturation ? What is the value of VDSAT ? Hints: Don't forget that M is a PMOS enhancement device. Some quantities are negative and the criteria for Triode, Saturation and Cutoff differs from NMOS devices. However, the equations for the drain current are the same for PMOS and NMOS. Find VG first. Next, write a KVL around the SG loop. Then, write a KVL around the SD loop.

Explanation / Answer

solution:

Vg = Vdd * R2 / (R1+R2) = (15*390k)/(260+390)k = 9V

Vsg = Vs

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