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COMPUTER ARCITECTURE MICROPROGRAMMING/MACHINE DISCRIPTION The following is a des

ID: 662845 • Letter: C

Question

COMPUTER ARCITECTURE

MICROPROGRAMMING/MACHINE DISCRIPTION

The following is a description of a machine called SIMMAC that contains the following: 512 32-bit words of memory (memory is word addressable).
Each Instruction consists of a 16-bit opcode and a 16-bit operand.
An ALU for performing mathematical operations.

Registers

ACC Accumulator; A 32-bit register involved in all arithmetic operations. One of the operands in each arithmetic operation must be in the Accumulator; the other must be in primary storage.

PSIAR Primary Storage Instruction Address Register; This 16-bit register points to the location in primary storage of the next machine language instruction to be executed.

SAR Storage Address Register; This 16-bit register is involved in all references to primary storage. It holds the address of the location in primary storage being read from or written to.

SDR Storage Data Register; This 32-bit register is also involved in all references to primary storage. It holds the data being written to or receives the data being read from primary storage at the location specified in the SAR.

TMPR Temporary Register; This 32-bit register is used to extract the address portion (rightmost 16-bits) of the machine instruction in the SDR so that it may be placed in the SAR. (No SDR to SAR transfer.)

CSIAR Control Storage Instruction Address Register; This register points to the location of the next micro-instruction (in control storage) to be executed.

IR Instruction Register; This register contains the current instruction being executed.

MIR Micro-instruction Register; This register contains the current micro-instruction being executed.

Register Transfers (REG is ACC, PSIAR, or TMPR):

SDR = REG REG = SDR SAR = REG

Primary Storage Operations:

READ Data from primary storage location named in the SAR is placed in the SDR.

WRITE Data in the SDR is placed in primary storage location named in the SAR.

Sequencing operations:

CSIAR = CSIAR + 1
CSIAR = decoded SDR
CSIAR = constant
SKIP = (add 2 to CSIAR if ACC=0; else add 1)

Operations involving the accumulator:

ACC = ACC + REG ACC = ACC - REG ACC = REG
REG = ACC

ACC = REG + 1 Instruction fetch:

(00) SAR = PSIAR

(01) READ

(02) IR = SDR

(03) SDR = decoded IR (Operand)

(04) CSIAR = decoded IR (OP CODE)

ADD (Opcode 10):

(10) TMPR = ACC
(11) ACC = PSIAR + 1 (12) PSIAR = ACC
(13) ACC = TMPR
(14) TMPR = SDR
(15) SAR = TMPR
(16) READ
(17) TMPR = SDR
(18) ACC = ACC + TMPR (19) CSIAR = 0

SUB (Opcode 20):

(20) TMPR = ACC
(21) ACC = PSIAR + 1 (22) PSIAR = ACC
(23) ACC = TMPR
(24) TMPR = SDR
(25) SAR = TMPR
(26) READ
(27) TMPR = SDR
(28) ACC = ACC - TMPR (29) CSIAR = 0

LOAD (LDA, Opcode 30):

(30) TMPR = ACC (31) ACC = PSIAR + 1 (32) PSIAR = ACC (33) ACC = TMPR (34) TMPR = SDR (35) SAR = TMPR (36) READ
(37) ACC = SDR
(38) CSIAR = 0

STORE (Name STR, Opcode 40):

(40) TMPR = ACC (41) ACC = PSIAR + 1 (42) PSIAR = ACC (43) ACC = TMPR (44) TMPR = SDR (45) SAR = TMPR (46) SDR = ACC
(47) WRITE
(48) CSIAR = 0

BRANCH (Name BRH, Opcode 50):

(50) PSIAR = SDR (51) CSIAR = 0

COND BRANCH (Name CBR, Opcode 60):

(60) SKIP
(61) CSIAR = 64
(62) PSIAR = SDR (63) CSIAR = 0
(64) TMPR = ACC (65) ACC = PSIAR + 1 (65) PSIAR = ACC (66) ACC = TMPR (67) CSIAR = 0

LOAD IMMEDIATE (LDI, Opcode 70):

(70) TMPR = ACC (71) ACC = PSIAR + 1 (72) PSIAR = ACC (73) ACC = TMPR (74) ACC = SDR
(75) CSIAR = 0

SIMMAC Programming Language Description

Addition
Usage: ADD

Where

holds the value to add to the accumulator.

Subtraction
Usage: SUB

Where

holds the value to subtract from the accumulator.

Load
Usage: LDA

Where

holds the value to load in to the accumulator.

Load Immediate
Usage: LDI number

Where number is the value to load in to the accumulator.

Store
Usage: STR

Where

is the storage location for the contents of the accumulator.

Branch
Usage: BRH

Where

is the target of the absolute branch.

Conditional Branch
Usage: CBR

Where

is the target of an absolute branch if the accumulator is zero.

You must develop the following SIMMAC language programs to be run on your SIMMAC machine:

1) Write three programs in the machine language of the SIMMAC that will total the numbers stored in 20 different locations and place the result in a single location.

2) Write a program in the machine language of the SIMMAC that will decrement the value stored in location 201 (must be at least 100) by one until the result is zero. Store the result in location 202.

3) Write a program in the machine language of the SIMMAC that will increment the value stored in location 301 by two until the value has been increased by 200. Store the result in location 302.

Each line of any SIMMAC program must have the following format:

Opcode Operand

Explanation / Answer

1)

movl    $20, -8(%rbp)

movl    $0, %eax

2)

jg      .L3

movl    $0, %eax

3)

movl    $1, -84(%rbp) movl    $2, -8(%rbp) movl    $3, -76(%rbp) movl    $4, -72(%rbp) movl    $5, -68(%rbp) movl    $6, -64(%rbp) movl    $7, -6(%rbp) movl    $8, -56(%rbp) movl    $9, -52(%rbp) movl    $10, -48(%rbp) movl    $11, -44(%rbp) movl    $12, -4(%rbp) movl    $13, -36(%rbp) movl    $14, -32(%rbp) movl    $15, -28(%rbp) movl    $16, -24(%rbp) movl    $17, -2(%rbp) movl    $18, -16(%rbp) movl    $19, -12(%rbp)

movl    $20, -8(%rbp)

movl $0, -4(%rbp) movl    -80(%rbp), %eax movl    -84(%rbp), %edx addl    %eax, %edx movl    -76(%rbp), %eax addl    %eax, %edx movl    -72(%rbp), %eax addl    %eax, %edx movl    -68(%rbp), %eax addl    %eax, %edx movl    -64(%rbp), %eax addl    %eax, %edx movl    -60(%rbp), %eax addl    %eax, %edx movl    -56(%rbp), %eax addl    %eax, %edx movl    -52(%rbp), %eax addl    %eax, %edx movl    -48(%rbp), %eax addl    %eax, %edx movl    -44(%rbp), %eax addl    %eax, %edx movl    -40(%rbp), %eax addl    %eax, %edx movl    -36(%rbp), %eax addl    %eax, %edx movl    -32(%rbp), %eax addl    %eax, %edx movl    -28(%rbp), %eax addl    %eax, %edx movl    -24(%rbp), %eax addl    %eax, %edx movl    -20(%rbp), %eax addl    %eax, %edx movl    -16(%rbp), %eax addl    %eax, %edx movl    -12(%rbp), %eax addl    %eax, %edx movl    -8(%rbp), %eax addl    %edx, %eax movl    %eax, -4(%rbp)

movl    $0, %eax

2)

  movl    $100, -8(%rbp)  
jmp     .L2                 .L3: subl    $1, -8(%rbp)                 .L2: cmpl    $0, -8(%rbp)

jg      .L3

movl    -8(%rbp), %eax movl    %eax, -4(%rbp)

movl    $0, %eax

3)

movl    $0, -8(%rbp) jmp     .L2                 .L3: addl    $2, -8(%rbp)                 .L2: cmpl    $200, -8(%rbp) jle     .L3 movl    -8(%rbp), %eax movl    %eax, -4(%rbp) movl    $0, %eax
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