9. What is the value of St0 for the following assembly code? (The answer has to
ID: 3913972 • Letter: 9
Question
9. What is the value of St0 for the following assembly code? (The answer has to be hexadecimal digits.) exactly 8 Answer: li $$0. 0x80000000 li $sl, 0xA0000000 sub $t0. $s0. $s1 Has there been overflow in the result in $t0?) Answer:(The answer has to be either Y or N.) 10. Assume that we would like to expand the MIPS register file to 256 registers, which two bit fields need to change their sizes for I-type instructions? (Choose two answers from the following: Opcode, Rs.Rt.Rd, Shmnt, Immediate). Answers: and (2pt) The number of these two bit fields will be increased from 5 bit to tobit. Answer: 11. What is the value of $t2 for the following sequence of instructions? (The answer has to be exactly 8 hexadecimal digits.) Answer .text $t8, 8xABCD9999 $t2,$te, 8 $t2 li sll ori $t2, 0xFF 12. (3pt) The following C code was translated to two MIPS assembly instructions that do the identical operation. Assume St1 = X, s2-Y, and Ssl is the base address of Z. data Z space 400 la Ss1, Z sll text Answer (3pt)Explanation / Answer
9. sub $t0, $s0, $s1 does a subtraction as $t0 = $s0 - $s1.
0x8000 0000 - 0xA000 0000 => 0x8000 0000 + (-0xA000 0000) using 2's complement
-0xA000 0000 in binary form is 0110 0000 0000 0000 0000 0000 0000 0000
= 1000 0000 0000 0000 0000 0000 0000 0000 + 0110 0000 0000 0000 0000 0000 0000 0000
= 1110 0000 0000 0000 0000 0000 0000 0000 =0xE0000000 which is -2000 0000
The value stored in $t0 is: 0xE0000000
As there is no overflow in the addition operation performed on the MSB bits of the operands, there is no overflow occured in the result.
Therefore answer is: No
10. Rs and Rt are the two bit fields that need to change their sizes. Rs is the source register and Rt is the destination register. At present the field size is 5 bits. Therefore each field can uniquely identify 25 (32) registers.
If the register file is expanded to 256(28) registers, then the number of bits required to uniquely identify these registers are 8. Hence the number of these two bit fields will be increased from 5 bits to 8 bits.
11. li instruction loads the value 0xABCD9999 into register $t0.
sll instruction shifts logical left by 8 bits on register $t0 and moves to $t2.
1010 1011 1100 1101 1001 1001 1001 1001 << 8 times
gives 1100 1101 1001 1001 1001 1001 0000 0000. Hence the value of $t2 after sll is 1100 1101 1001 1001 1001 1001 0000 0000 (0xCD999900).
ori $t2, $t2, 0xFF, first performs a zero-extension on 8-bit immediate value to 32-bit value. Then it performs a bitwise or operation and stores it in $t2. Therefore value of $t2 after ori execution is:
1100 1101 1001 1001 1001 1001 0000 0000 or 0000 0000 0000 0000 0000 0000 1111 1111
=> 1100 1101 1001 1001 1001 1001 1111 1111 (0xCD9999FF)
12. sll $t1, $t3, 4, as the $t1 is the target register and $t3 is the source register and 4 is the immediate value. By executing this instruction, the content of $t3, i.e Z[0] is shifted logical left by 4 times and stored in register $t1 which is X. Thus X=Z[0]<<4 is performed by the above instruction.
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