0 Add Addresult Shift left 2 RegDst Branch ea Instruction (31-26 Control mWn Ins

Question

0 Add Addresult Shift left 2 RegDst Branch ea Instruction (31-26 Control mWn Instruction [25-21] Read register 1 Read register 2 register data Registers PCRead address Instruction 120-16 Read data ALU ALUAddress dataM 31-0] Instruction | | |Instruction [15-11] | MWrite data 2 Read I write Write Data data me Instruction [15-0 16 Sign- 32 ALU control Instruction [5-0] 1. Consider the single stage CPU the given instructions by entering 0, 1, or x for “don't care". represented in the diagram. Complete the control line table below for Instruction Instruction Instruction Instruction Instruction #1: #2 : #3: #4: #5: sltu $t0, $tl, $t2 10101100011000100000000000010100 sh $to,$t1,100 beq $to, $t1, L1 0x2D090001 RegDst Branch MemRead MemtoReg MemWrite ALUSrc RegWrite #1 #2 #3 #4 #5

Explanation / Answer

Contlrol unit ishandling the control over the instruction over each instruction executed properly.

regDst Branch MemRead MemtoReg memWrite ALUSrc regWrite Instruction #1: sltu $t0,$t1,$t2 1 0 0 0 0 0 1 Instruction #2: 10101100011000100000000000010100 x 0 0 x 0 0 0 Instruction #3: sh $t0,$t1,100 10 x 0 x 0 xx 1 Instruction #4: beq $t0,$t1,L1 x 0 0 x 0 0 0 Instruction #5 0x2D090001 x 0 1 x x 0 1

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