Some architectures support the ‘memory indirect’ addressing mode. Below is an ex

Question

Some architectures support the ‘memory indirect’ addressing mode. Below is an example. In this case, the register R2 contains a pointer to a pointer. Two memory accesses are required to load the data.

ADD R3, @(R2)

Assume that our ISA does not support memory-indirect addressing, implement the functionality of the previous statement using other addressing modes were covered in the class. Note that you can use multiple instructions. Assume that the pointer to pointer is currently in R2, R3 holds the value to be added, and the result will be stored in R3.

Explanation / Answer

Memory Indiredct addressing mode:

ADD R3, @(R2)
let us assume R2 contains 3000
and R3 contains 10
and adress location 3000 contains 20

So there is a value in 3000 address location to which the content in R3 must be added.
After executing the above instruction R3 contains the result 30.

If the memory indirect address is not available to the architecture of the processor, let us move to indexed addressig mode:
Here goes the program:

1. MOV  A, R2  ;now Accumulator contains 3000 (Register Direct Addressing mode)
2. MOV  DTPR,#0  ;Clears the Data Pointer (Immediate Addressing mode)
3. MOVC A,@A+DPTR ;Now A Contains the value which is in the memory location (A= 20) (Indexed Addressing mode)
4. ADD  R3,A  ;R3= R3+A ==> 30 (Register Direct Addressing mode)

In the above program we didn't used any indirect addressing mode instruction, still we got the result as that single instruction.

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