In MIPS, the structure of its instructions is simplified. The way we implement c

Question

In MIPS, the structure of its instructions is simplified. The way we implement complex instructions through the use of MIPS simplified instructions is to decompose complex instructions into multiple simpler MIPS ones. Show how MIPS can implement the instruction swap $rs, $rt, which swaps the contents of the registers $rs and $rt. Consider the case in which there is an available register that may be destroyed as well as the case in which no register exists.

If the implementation of this instruction in hardware will increase the clock period of a single instruction by 10%, what percentage of swap operations in the instruction mix would justify implementing it in hardware?

Explanation / Answer

Swap $rs, $rt can be decomposed into three instructions without using swap instruction

Available register ($rd ) case: swap $rs,$rt can be implemented as follows:

addi $rd,$rs,0

addi $rs,$rt,0

addi $rt,$rd,0

No available register case:

sw $rs,temp($r0)

addi $rs,$rt,0

lw $rt,temp($r0)

Alternate solution:

xor $rs,$rs,$rt

xor $rt,$rs,$rt

xor $rs,$rs,$rt

Clock cycle tradeoff evaluation:

Software takes three cycles, and hardware takes one cycle.

Let ‘Rs’ be the ratio of swaps in the code mix. Also, assume a base CPI=1 (which it is for the MIPS). Now:

Avg time per instruction: (Software):

Rs*3*T + (1 – Rs)*1*T = (2Rs + 1) * T

(Hardware):

T Hardware implementation makes sense only if: T <= (2Rs + 1) * T

-- > 10% increase in clock period:

Clock period = 1.10 * T

i.e. if swap instructions are greater than 5% of the instruction mix (Rs >= 0.05), then a hardware implementation would be preferable.

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