i know some of the currect answers a- Linearly c- After whats the other and why

Question

i know some of the currect answers

a- Linearly

c- After

whats the other and why

The 8086's 6-byte long prefetch queue was a structure that aided processor performance as long as the instruction execution sequence was implemented (with for-next loops/circularly/random ly/linearly/using many branches circle one). Externally, the 8086 had a _____________________ address/data bus, which meant that the address signals and the data signals shared the same pins on the chip. This meant that the address had to be latched into external circuitry (before/after circle one) the data was on the bus. To accomplish the latching, the 8086 (and 8088) had an additional pin, called ______________________ to allow the external circuitry to latch in the address. Upon reset, the CS register is loaded with ____ and the instruction pointer register is loaded with ___________, for a real-mode physical address of _____________ hex.

Explanation / Answer

Externally 8086 had a data bus,which meant that the address signals and datat signals shared the same pins on the chip

To accomplish the latching 8086 had additional pin called,ALE(Address Latch Enable) to alloww external circuitry to latch in address.

Upon reset,the CS register is loaded with FFFFh and the instruction pointer register is loaded with 0000h,forreal mode physical address of FFFFFFF0 hex

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