Below is a logic circuit that implements a multiplexer. What is the overall beha

Question

Below is a logic circuit that implements a multiplexer. What is the overall behaviour of the circuit? An ALU normally contains a number of multiplexer circuits, how many of these might you expect to find in an ALU in a modern CPU and what is their purpose?

(b) Below is a logic circuit that implements a multiplexer. The circuit contains inverters, AND gates and one OR gate. It has six inputs (labelled A, B and D1-D4) and one output. What is the overall behaviour of the circuit? D1 D2 Output D3 D4 An Arithmetic Logic Unit (ALU) normally contains a number of multi plexer circuits. How many of these might you expect to find in an ALU in [17 marks] a modern CPU chip, and what is their purpose?

Explanation / Answer

The circuit chooses the output based on the selectors A and B. That is if the selectors are 0,0 then D1 is forwarded to the output line. Similarly then A and B are set to (0,1) we will have D2 in the output. To have D3 A and B should be 1 and 0 respectively. And if A and B are both 1, we shall have D4 at the output line.

Depending on the implementation and architecture of ALU, it can house multiple MUXs. Few Notable uses of the MUX are:
1 Select A/A’ Select B/B’ ( though this can also be achieved using a xor)
2 Select one input from list of A and B, A or B, A xor B, A + B
3 Forward data to buffer and ignore other path of data
4 In pipeline processes, MUX can be used to select the input if there is a feed back

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