5. Q5 [15 points] Convert following machine code into your MIPS assembly code. A

Question

5. Q5 [15 points] Convert following machine code into your MIPS assembly code. Also identify type of each instruction, e.g., R-type, I-type, or J-type. 0x02F34022 0x8C0A0020 0x02328020 0x2268FFF4 0x016D4022 5. Q5 [15 points] Convert following machine code into your MIPS assembly code. Also identify type of each instruction, e.g., R-type, I-type, or J-type. 0x02F34022 0x8C0A0020 0x02328020 0x2268FFF4 0x016D4022 5. Q5 [15 points] Convert following machine code into your MIPS assembly code. Also identify type of each instruction, e.g., R-type, I-type, or J-type. 0x02F34022 0x8C0A0020 0x02328020 0x2268FFF4 0x016D4022

Explanation / Answer

5. Q5 [15 points] Convert following machine code into your MIPS assembly code. Also
identify type of each instruction, e.g., R-type, I-type, or J-type.
0x02F34022
The binary equivalent is:
0000 0010 1111 0011 0100 0000 0010 0010
000000 10111100110100000000 100010
The first six bits represent its a Special type of instruction.
And considering the last 6 bits 100010 represent its a SUB instruction.
And the syntax for SUB instruction is:
SUB rd, rs rt
So, dividing the bits:
000000   10111   10011   01000   00000 100010
So, Its an R-type instruction.
rd is: 10111 which means its register $s7.
rs is: 10011 which means its register $s3.
rt is: 01000 which means its register $t0.
Therefore, the MIPS equivalent is:
SUB $t0, $s7, $s3

0x8C0A0020
The binary equivalent is:
1000 1100 0000 1010 0000 0000 0010 0000
100011   00000010100000000000100000  
The first six bits 100011 represent its Load Word (LW) instruction.
And the syntax for LW instruction is:
LW rt, offset(base)
So, dividing the bits:
100011   00000   01010   0000000000100000
So, its an I-type instruction.
rt is: 01010 which means its register $t2.
offset is: 100000 = 0x20
Therefore, the MIPS equivalent is:
LW $t2 0x0020 $zero

0x02328020
The binary equivalent is:
0000 0010 0011 0010 1000 0000 0010 0000
000000   10001100101000000000   100000
The first six bits represent its a Special type of instruction.
And considering the last 6 bits 100000 represent its a ADD instruction.
And the syntax for ADD instruction is:
ADD rd, rs, rt.
So, dividing the bits:
000000   10001   10010   10000   00000   100000
So, its an R-type instruction.
rs is: 10001 which means its register $s1.
rt is: 10010 which means its register $s2.
rd is: 10000 which means its register $s0.
There, the MIPS equivalent is:
ADD $s0, $s1, $s2

0x2268FFF4
The binary equivalent is:
0010 0010 0110 1000 1111 1111 1111 0100
001000   10011010001111111111110100
The first six bits 001000 represent its ADDI instruction.
And the syntax for ADDI instruction is:
ADDI rt, rs, immediate
So, dividing the bits:
001000   10011   01000   1111111111110100
So, its an I-type instruction.
rs is: 10011 which means its register $s3.
rt is: 01000 which means its register $t0.
Immediate value is: 1111111111110100 = 0xFFF4.
Therefore, the MIPS equivalent is:
ADDI $t0, $s3, 0xFFF4.

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