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1. You purchase a machine with the following features: ¥ 95% of all memory acces

ID: 3763703 • Letter: 1

Question

1. You purchase a machine with the following features: ¥ 95% of all memory access are found in the cache ¥ Each cache block is two words, and the whole block is read on any miss ¥ The processor sends references to its cache at the rate of 109 words per second ¥ 25% of those references are writes ¥ Assume that the memory system can support 109 words per second, reads or writes ¥ The bus reads or writes a single word at a time (the memory system cannot read or write two words at once) ¥ Assume at any one time, 30% of the blocks in the cache have been modified ¥ The cache uses write allocate on a write miss You are considering adding a peripheral to the system, and you want to know how much of the memory system bandwidth is already used. Calculate the percentage of memory system bandwidth used on average for the following two cases (be sure to state any assumptions): (A) The cache is write through (B) The cache is write back

Explanation / Answer

a) The cache is write through.

Total Bandwidth Used = BW used on Read hit + BW used on Read miss  + BW used on Write hit
+ BW used on write miss
                                           ; = 0 + 109 * 0.05 * 0.75 * 2 +109 * 0.95 * 0.25 * 1 + 109 * 0.05 * 0.25 * (2+1)
                                           ; = 109 * 0.4625

Total Bandwidth Used 109 * 0.4625
---------------------------- = ------------- = 0.4625
     Total Bandwidth   109

b) The cache is write back.
  

Total Bandwidth Used = BW used on Read hit + BW used on Read miss + BW used on Write hit

+ BW used on write miss
                                           ; = 0 + 109 * 0.05 * 0.75 * [2 * 0.3 + 2] + 0 + 109 * 0.05 * 0.25 * [2 * 0.3 + 2]
                                           ; = 107 * 0.26

Total Bandwidth Used 109 * 0.26
---------------------------- = ------------- = 0.108
  Total Bandwidth   109

Bus Bandwidth Used Reasoning Read hit 0 Hit means reference is found in cache, so no bus bandwidth used Read miss 109 * 0.05 * 0.75 * 2 miss ratio = 1- hit ratio = 1 - 0.95 = 0.05
reads are 75% of total number of references  
block size = 2 words Write hit 109 * 0.0.05 * 0.25 * 1 Because we have write through policy we have to write to main memory on every hit. But we have to write only 1 word.  
Writes are 25% of total number of references,  
hit ratio = 0.95 Write miss 109 * 0.05 * 0.25 * (2+1) On every write miss we have to load a block (2 words) to cache because of write allocate policy, and write 1 word ( the word to write from CPU) because of write through policy.
Writes are 25% of total number of references,  
hit ratio = 0.5