QUESTION 1 Assume that in the JK flip-flop (given by its characteristic table be

Question

QUESTION 1

Assume that in the JK flip-flop (given by its characteristic table below),  J is held at 1 and K is held at 0. What will the output at Q be after several gate delays?

0

1

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1 points   

QUESTION 2

Assume that in the JK flip-flop,  J is held at 1 and K is held at 0 for several gate delays. If K is then set to 1 while maintaining J at 1, what will the output at Q be?

0

1

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1 points   

QUESTION 3

Assume that in the JK flip-flop,  J is held at 0 and K is held at 1 for several gate delays. If K is then set to 0 while maintaining J at 0, what will the output at Q be?

0

1

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1 points   

QUESTION 4

List the elements of the last column (Next State A) of the characteristic table for the sequential circuit below.

#1

#2

#3

#4

1 points   

QUESTION 5

List the elements of the last column (Next State A) of the characteristic table for the sequential circuit below.

#1

#2

#3

#4

1 points   

QUESTION 6

List the elements of the last column (Next State A) of the characteristic table for the sequential circuit below.

#1

#2

#3

#4

1 points   

QUESTION 7

List the elements of the last column (Next State A) of the characteristic table for the sequential circuit below. Note: This circuit contains SR flip-flop, which is not always well defined. Use -1 for invalid (undefined) states.

#1

#2

#3

#4

1 points   

QUESTION 8

In the characteristic table for the sequential circuit below, two rows are incorrect. Which ones?

3 and 8

3 and 5

5 and 7

7 and 8

1 points   

QUESTION 9

In the characteristic table for the sequential circuit below, two rows are incorrect. Which ones?

1 and 3

5 and 6

3 and 8

7 and 8

1 points   

QUESTION 10

In the characteristic table for the sequential circuit below, two rows are incorrect. Which ones?

6 and 7

3 and 8

5 and 6

1 and 3

1 points   

QUESTION 11

In the characteristic table for the sequential circuit below, two rows are incorrect. Which ones?

1 and 8

3 and 8

5 and 6

1 and 3

0

1

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Explanation / Answer

Now remembter this table:
J    K    Q    Q'
-------------------
0    0    Q    Q'
0    1    0    1
1    0    1    0
1    1    Q'   Q

So
QUESTION 1

Assume that in the JK flip-flop (given by its characteristic table below), J is held at 1 and K is held at 0. What will the output at Q be after several gate delays?

Answer is 1

QUESTION 2

Assume that in the JK flip-flop, J is held at 1 and K is held at 0 for several gate delays. If K is then set to 1 while maintaining J at 1, what will the output at Q be?

Answer: They are toggle state, so logically the value should toggle.
     When J = 1, K = 0, Q was 1
     Then when J = 1, K = 1, Q should be 0 in next clock

QUESTION 3

Assume that in the JK flip-flop, J is held at 0 and K is held at 1 for several gate delays. If K is then set to 0 while maintaining J at 0, what will the output at Q be?

Answer: They are hold state, so logically the value should hold forever.
     When J = 0, K = 1, Q was 0
     Then when J = 0, K = 0, Q should be 0 in next clock

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