6. (12 pts.) The following BCD to 7-segment control signal decoder has 4-bit BCD

Question

6. (12 pts.) The following BCD to 7-segment control signal decoder has 4-bit BCD as input (A, B, C, D), and 7- bit control as output (cO c6). All input and output signals are active high. The decoder is shown using dark/thick outline in the figure below. The control signal values for each BCD input can be derived using the given description. C5 cl 08289 S6889 C4 c2 cO c1 c2 c3 c4 c5 c6 BCD to 7-segment control signal decoder A B C D (8 pts.) Show a complete truth table for the implementation of the BCD to 7-segment control signal decoder including any don't cares, if any. (4 pts.) If you need to design a two-level reduced combinational logic circuit for BCD to 7-segment control signal decoder, a) How many Karnaugh Maps would you need? b) What would be the size of each Karnaugh Map (2x2, 2x3, 2x4, 3x4, 4x4, 4x8, 4x5, 4x6, 4x7, 4x8, 5x4, 5x5, 5x6, 5x7, etc.)? (Note: You do not have to complete the design in this question.) i. ii.

Explanation / Answer

1. Truth Table can be given as: (X's denote the don't care conditions)

2. We would require 7 K-Maps, each of size 4X4.

A B C D c0 c1 c2 c3 c4 c5 c6 0 0 0 0 1 1 1 1 1 1 0 0 0 0 1 0 1 1 0 0 0 0 0 0 1 0 1 1 0 1 1 0 1 0 0 1 1 1 1 1 1 0 0 1 0 1 0 0 0 1 1 0 0 1 1 0 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 0 1 0 X X X X X X X 1 0 1 1 X X X X X X X 1 1 0 0 X X X X X X X 1 1 0 1 X X X X X X X 1 1 1 0 X X X X X X X 1 1 1 1 X X X X X X X

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