For the system in problem 4, suppose a main memory access requires 30ns, the pag

Question

For the system in problem 4, suppose a main memory access requires 30ns, the page fault rate is .01%, it costs 12ms to access a page not in memory (this time includes the time necessary to transfer the page into memory, update the page table, and access the data). Also suppose a TLB hit requires 7ns, the cache miss rate is 3%, the TLB hit rate is 95%, a cache hit requires 15 ns. On a TLB or cache miss, the time required for access includes a TLB and/or cache update, but the access is not restarted. On a page fault, the page is fetched from disk, all updates are performed but the access is restarted . All references are sequential (no overlap, nothing done in parallel)

a.) Calculate the time for a TLB hit and a cache hit.

b.) Calculate the EAT (effective access time) for a TLB hit.

Explanation / Answer

The Operating system uses virtual memory and page tables maps these virtual address to physical address. TLB works as a cache for such mapping.

A program search for a page in TLB, if it doesn't find that page it's a TLB miss and then further looks for the page in cache.

If the page is not in cache then it's a cache miss and further looks for the page in RAM.

If the page is not in RAM, then it's a page fault and program look for the data in secondary storage.

So, typical flow would be

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