We would like to run the following code(s) on the pipeline MIPS. Please show the

Question

We would like to run the following code(s) on the pipeline MIPS. Please show the values of all the control signals only in clock cycle 6 (you can find the figure in course lectures too Note that the first instruction is fetched in clock cycle 1 Also note that no forwarding is assumed and any data (real) hazards (i.e., RAW dependencies) are handled strictly by the compiler. This is to say, you may modify any of the streams in a) or b) as the compiler would, to render the code hazard free. a) add $1, $3, $5 and $10, $8, $3 le $4, 16(S3) sub $11, $2, $7 sx $2,1ee($6) b) AC $1, $3, $5 add $10, $8, $3 le $4, 16(S3) sub $11, $2, $4 sx $11,8 $8) Fill in the tables below and write the control signals for each case on the schemes (4.51 Solution

Explanation / Answer

Answer is as follows:

The table with control signals for given scenario is as follows :

a)

Total Cycles = 10

b)

Total Cycles = 11

Control Signals :

FI = Fetch Instruction

ID = Instruction Decoding

EX = Execute Instruction

MEM = Memory Read/Write

WB = Register Write

* used to present hazard..

if there is any query please ask in comments...

cycles-> 1 2 3 4 5 6 7 8 9 10 add $1,$3,$5 FI ID EX MEM WB and $10,$8,$3 FI ID EX MEM WB lw $4, 16($3) FI ID EX MEM WB sub $11,$2,$7 FI ID EX MEM WB sw $11,8($8) FI * ID EX MEM WB

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