[21 marks] Consider a computer with a byte-addressable memory. A 40-bit memory a

Question

[21 marks] Consider a computer with a byte-addressable memory. A 40-bit memory address is divided as follows for cache processing. First, the 8 low-order bits are chopped off to expose the cache-line number. Second, the next 17 low-order bits are inspected to get the cache-container index. Third, the remaining 15 bits are used as the cache tag. Note: This question is harder than it looks.

a) [7 marks] What is the cache size in bytes?

b) [7 marks] What is the cache-mapping scheme?

c) [7 marks] For a given byte in the cache, how many different bytes in the main memory could possibly be mapped to it?

Explanation / Answer

a) A cache size may varry according to the cache line, it can 32,64 and 128 bytes.

Cache size influences the performance of a client machine more directly than perhaps any other cache parameter. The larger the cache, the faster the Cache Manager is likely to deliver files to users. A small cache can impair performance because it increases the frequency at which the Cache Manager must discard cached data to make room for newly requested data.

b)  cache-mapping scheme :

It treats the slot as a large array, and the index of the array is picked from bits of the address (which is why we need the number of slots to be a power of 2---otherwise we can't select bits from the address)

The scheme can suffer from many addresses "colliding" to the same slot, thus causing the cache line to be repeatedly evicted, even though there may be empty slots that aren't being used, or being used with less frequency.

If there's an advantage to the scheme, it's very simple, You don't have to simulataneously match tags with all slots. You just have one slot to check.

If the data isn't in the slot, it's obvious that this is the slot to get evicted.

c. For a given byte in a cache 2^64 bytes types of main memories can be mapped.

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