Exercise 2: [4.2] The basic single-cycle MIPS implementation in Figure 1 can onl
ID: 3604919 • Letter: E
Question
Exercise 2: [4.2] The basic single-cycle MIPS implementation in Figure 1 can only implement some instructions. New instructions can be added to an existing Instruction Set Architecture (ISA), but the decision whether or not to do that depends, among other things, on the cost and complexity the proposed addition introduces into the prwcesoratnd control. The frsthree probhlems in this exercise refer to the new instruction Interpretation: Reg[Rt] = Mem [Reg[Rd]+Reg [Rs]] a. Which existing blocks (if any) can be used for this instruction? b. Which new functional blocks (if any) do we need for this instruction? c. What new signals do we need (if any) from the control unit to support this instruction?Explanation / Answer
a)Which existing blocks (if any) can be used for this instruction?
1) SEQ is a Boolean operation returning 1/true or 0/false if the two registers are equal.
reg, mux, alu
2) the contents of a memory allocation is the sum of two registry values lead by LWI.
reg, mux, alu, memory
b)Which new functional blocks (if any) do we need for this instruction?
1) a mux after ALU zero for Boolean 0 or 1
2) nothing
c)What new signals do we need (if any) from the control unit to support this instruction?
1) need control signal to operate new mux
2) nothing
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