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Part 2 2.1. [3 marks] Over the years architectures have changed from 8 to 16 to

ID: 3598039 • Letter: P

Question

Part 2 2.1. [3 marks] Over the years architectures have changed from 8 to 16 to 32 to 64-bit machines. At the same time the address spaces have moved from 16 (there were never any widely used 8-bit address spaces) to page 2 COMPSCI 340 &SOFTENG; 370 Assignment 3 32 to 64-bit addresses. Give an example of a CPU which provides 64-bit addresses but is backwardly compatible with code that produces 32-bit code. What consequences does moving from a 32-bit environment to a 64-bit environment have on programs, including the operating system? 2.2. 4 marks] We can keep track of free memory in a similar way to free blocks on disk. We could use a bitmap where 1 bit represents a free frame of memory or we could maintain a linked list of free frames. The linked list is maintained as a list of nodes where each node has a frame number, and a pointer to the next node. Assume these pointers and numbers are 32 bits each. Calculate the space requirements using each of those methods for the following system, give the answers in bytes: 16 GB (234 bytes) of RAM in 8 KB (213 bytes) frames. Assume that memory is currently being used in alternating chunks of size 1 MB (220 bytes). i.e. The first MB of RAM is used, the second is free, the third is used, etc. How much of that space (for both approaches) would normally be in kernel memory? Why? How would an extents version compare to the two approaches in the question above? 2.3. [2 marks] We have a system with 32-bit virtual addresses and 1024 processes. Assuming all pages may need to be stored in virtual memory without any sharing, what is the maximum amount of space we should allocate for swap space? How realistic is this amount? 2.4. 1 mark] You are given the following data about a virtual memory system: the TLB can hold 1024 entries and can be accessed in 1 clock cycle, 1 nanosecond. memory can be accessed in 50 clock cycles or 50 nanoseconds. a page table entry can be found in 100 clock cycles or 100 nanoseconds. the average page replacement time is 5 milliseconds. If page references are handled by the TLB 99% of the time, and only 0.01% lead to a page fault, what is the effective access time?

Explanation / Answer

Solution:

Multiple questions asked, please ak them separetly.

hit rate= 0.99 and miss rate= 0.01

Formula for Effective memory access time= x(c+m) + (1-x) * (page replacement time) * page table entry search(c+2m)

where x is the hit ratio, c is the TLB access time, and m is the main memory access time

Now,

Effective memory access time= 0.99(1+50) + (0.0099 * (1+50+100)) + 0.0001 * (5000000 + 100 + 1 + 50 +50 + 1)

= 552.005 nanoseconds

Please, please upvote and ask your doubts in the comments.

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