I am struggling to understand the solution (given below) to the following questi

Question

I am struggling to understand the solution (given below) to the following question. I don't understand how 0x29 can be a hit, while none of the other addresses will hit. It would help if someone could draw a diagram of the cache, and in general explain. Thanks!

Question:

Consider a cache with the following configuration: write-allocate, total size is 16 bytes, block size is 4 bytes, and 2-way associative. The memory address size is 16 bits and byte-addressable. The replacement policy is LRU. The cache is empty at the start. For the following memory accesses, indicate whether the reference is a hit or miss, and the type of a miss (compulsory, conflict, capacity):
(a) Write

Explanation / Answer

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Compulsory

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