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A 5-stage pipelined RISC processor R2 uses a static branch predictor with a alwa

ID: 2988726 • Letter: A

Question

A 5-stage pipelined RISC processor R2 uses a static branch predictor with a always-not-taken prediction. A program P2 is executed on the processor R2. Assume that 15% of the dynamic instructions in program P2 are branch instructions and 70% of all the branches are taken. Also assume that branch mispredictions are the only source of pipeline stalls 111 processor R2. How many cycles does it take for R2 to complete 1 million instructions under the following two scenarios? The computation of branch outcome is earned out in the "Compute" stage (stage-3). The computation of branch outcome is earned out in the "Decode" stage (stage-2).

Explanation / Answer

Solved for-

Branches: 20%
Loads: 20%
Stores: 10%
Arithmetic Instructions: 50%
Assume that the program P1 has no data dependencies. C1 uses a dynamic branch predictor and a
branch target buffer to predict the branch instructions. The computation of actual branch outcomes is
carried out in the

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