timing dagram please explain how to get the timing diagram f? the y and z part t
ID: 2292987 • Letter: T
Question
timing dagram please explain how to get the timing diagram f? the y and z part that is where ' am confused i have posted two pro kms with the solutions bui am not asking you to solve the problem just explain how they found the value for y and z m each timing diagram thank you ? will thu up if y clarification helps me! first 8.1 For the synchronous sequential circuit of Fig. P8.1, find (a) The state table using K-maps and A 0, B1 (b) The state diagram if the circuit input is in pulse form (c) The timing diagram for an input sequence 00100110 and the starting state yo-1. Clock Input Present0 Input # Input # Present 0 1o/o 1/0 11/0 o/0 T/z Next Statefz o 0
Explanation / Answer
Solution-1
As we know the truth table for T-flip flop is as under
where T is the input to T-flip flop and Q(t) and Q(t+1) are the previous and present output respectively.
Here is the inverted clock is there therefore the output will be changed when the neagtive edge is triggered.
We always see the status of every input before the negative edge of every clock pulse
In your question Y is your flip flop output. If you look closely your circuit then you find that your flip-flop input T depends upon two variable one is your input x and other is flip flop output y.
T=xy, means T is 1 only when both x and y are 1. otherwise it is 0. As per the question intial value of y is 1.
so as per sequence of x=00100110, for first pulses before negative edge of clock, x is 0 means the T=xy will be 0 and the value of y is 1.
As per the truth table of T-flip flop when T is 0 and y is 1 then y(t+1) will be 1 as the negative edge of the clock triggered(as the clock is inverted,bubble is there).
In third pulse before negative edge the status of x=1 and y=1 then T will be 1 and as per the truth table of flip flop when T is 1 and y is 1 then y(t+1) will be 0 when negative edge of clock is triggered.
In fourth clock pulse before neagtive edge the status of x=0 and y=0 then T =0 and as per the truth table when T is 0 and y is 0 then y(t+1) will zero at negative edge triggered.
In fifth pulse before negative edge the status of x=0 and y=0 then T will be 0 and as per the truth table of flip flop when T is 0 and y is 0 then y(t+1) will be 0 when negative edge of clock is triggered.
In sixth clock pulse before neagtive edge the status of x=1 and y=0 then T =0 and as per the truth table when T is 0 and y is 0 then y(t+1) will 0 at negative edge triggered.
In seventh pulse before negative edge the status of x=1 and y=0 then T will be 0 and as per the truth table of flip flop when T is 0 and y is 0 then y(t+1) will be 0 when negative edge of clock is triggered.
In eighth pulse before negative edge the status of x=0 and y=0 then T will be 0 and as per the truth table of flip flop when T is 0 and y is 0 then y(t+1) will be 0 when negative edge of clock is triggered.
Solution-2
As we know the truth table for T-flip flop is as under
where T is the input to T-flip flop and Q(t) and Q(t+1) are the previous and present output respectively.
Here is the inverted clock is there therefore the output will be changed when the neagtive edge is triggered.
We always see the status of every input before the negative edge of every clock pulse
In your question Y is your flip flop output. If you look closely your circuit then you find that your flip-flop input T depends upon variable z and z depends upon two variable one is your input x and other is flip flop output y.
T=z=xy'+x'y, means T is 1 only when both x and y are having different status . otherwise it is 0. Means when x=0,y=1 and x=1,y=0 then T will be 1 otherwise it is 0. As per the question intial value of y is 0.
so as per sequence of x=000101011, for first three pulses before negative edge of clock, x is 0 and y=0 means the T=z will be 0 and the value of y is 0.
As per the truth table of T-flip flop when T is 0 and y is 0 then y(t+1) will be 0 as the negative edge of the clock triggered(as the clock is inverted,bubble is there).
In fourth pulse before negative edge the status of x=1 and y=0 then T will be 1 and as per the truth table of flip flop when T is 1 and y is 0 then y(t+1) will be 1 when negative edge of clock is triggered.
In fifth pulse before negative edge the status of x=0 and y=1 then T will be 1 and as per the truth table of flip flop when T is 1 and y is 1 then y(t+1) will be 0 when negative edge of clock is triggered.
In sixth clock pulse before neagtive edge the status of x=1 and y=0 then T =1 and as per the truth table when T is 1 and y is 0 then y(t+1) will 1 at negative edge triggered.
In seventh pulse before negative edge the status of x=0 and y=1 then T will be 1 and as per the truth table of flip flop when T is 1 and y is 1 then y(t+1) will be 0 when negative edge of clock is triggered.
In eighth pulse before negative edge the status of x=1 and y=0 then T will be 1 and as per the truth table of flip flop when T is 1 and y is 0 then y(t+1) will be 1 when negative edge of clock is triggered.
In ninth pulse before negative edge the status of x=1 and y=1 then T will be 0 and as per the truth table of flip flop when T is 0 and y is 1 then y(t+1) will be 1 when negative edge of clock is triggered.
T Q(t) Q(t+1) 0 0 0 0 1 1 1 0 1 1 1 0Related Questions
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