Objective Design a system that find the maximum number in an array. The project

Question

Objective

Design a system that find the maximum number in an array. The project includes the design of and finite state machine (FSM), datapath and the testbench to validate your system.

Description

In this project, you will design a System that find the maximum number in a array; the system includes the design of FSM and the datapath. The following pseudo code describes the operation of the system:

Int maximum(int startaddr,intn){

Int max = mem[startaddr);

For(i=0; i<n; i++){

If(mem[startaddr +i]>max{

Max=mem[startaddr+i];

}

}

}

The project implements the pseudo code maximum. In this code, startaddr and n are provided by an external source and remain stable through the calculation loop.

A testbench is necessary to validate your design. The testbench provides the mclk, reset, startaddr, n, and start signals. After the start signal is provided, startaddr and n will remain constant. The testbench waits for the done signal. After the done signal the testbench waits 1 clock cycle and confirms the output signal is correct.

Operation

The FSM is responsible for active/deactive the signals to proper operation of the datapath. In addition to the pseudo code, the design includes hand shake pins “start” and “done”. Start tells the FSM to start a calculation loop. The FSM provides the done signal when it is IDLE. Star” and done are handle by the FSM.

The mclk and reset signals are not shown in the figure 1. Design your project in the following steps.

1. Datapath

List all blocks required for the datapath. Provide a short description of each.

List the inputs and outputs of the data path. For each input list the source of the
input. For each output list the destination.

Implement your datapath in Verilog

2. FSM

Draw a ASM chart

List the inputs and outputs of the FSM. For each input list the source of the input.
For each output list the destination

Implement the FSM using the ASM chart in Verilog.

Create a memory module called mem.v with depth = 256 and width = 16. Initialize the memory with the file provided (ram.coe)

Complete the top module provided (top.v)

Validate your design using the testbench. For full credit your datapath should produce
“0” ERROR messages in the simulation console window.

**************************************************************************************************************************************************************

`timescale 1ns / 1ps

////////////////////////////////////////////////////////////////////////////////

////////////////////////////////////////////////////////////////////////////////

module testProject;

// Inputs

reg mclk;

reg reset;

reg start;

reg [7:0] n;

reg [15:0] startaddr;

// Outputs

wire done;

wire [15:0] max; //

// Instantiate the Unit Under Test (UUT)

top uut (

.mclk(mclk),

.reset(reset),

.start(start),

.n(n),

.startaddr(startaddr),

.done(done),

.max(max)

);

initial begin

// Initialize Inputs

mclk = 0;

reset = 0;

start = 0;

n = 0;

startaddr = 0;

// Wait 100 ns for global reset to finish

#100;

// Add stimulus here

reset = 1;

#25 reset = 0;

@(posedge mclk);

#5 n = 2;

startaddr = 0;

start = 1;

@(posedge mclk);

#5 start = 0;

wait (done);

@(posedge mclk);

if (max != 16'h0878)

$display("ERROR: Maximum incorrect. startaddr = %x, n = %d, max = %x, expected max = %x", startaddr, n, max, 16'h0878);

else

$display("PASS: Maximum correct. startaddr = %x, n = %d, max = %x, expected max = %x", startaddr, n, max, 16'h0878);

@(posedge mclk);

#5 n = 4;

startaddr = 8'h20;

start = 1;

@(posedge mclk);

#5 start = 0;

wait (done);

@(posedge mclk);

if (max != 16'h130a)

$display("ERROR: Maximum incorrect. startaddr = %x, n = %d, max = %x, expected max = %x", startaddr, n, max, 16'h130a);

else

$display("PASS: Maximum correct. startaddr = %x, n = %d, max = %x, expected max = %x", startaddr, n, max, 16'h130a);

@(posedge mclk);

#5 n = 7;

startaddr = 8'hf9;

start = 1;

@(posedge mclk);

#5 start = 0;

wait (done);

@(posedge mclk);

if (max != 16'h54ab)

$display("ERROR: Maximum incorrect. startaddr = %x, n = %d, max = %x, expected max = %x", startaddr, n, max, 16'h54ab);

else

$display("PASS: Maximum correct. startaddr = %x, n = %d, max = %x, expected max = %x", startaddr, n, max, 16'h54ab);

end

initial forever #10 mclk = ~mclk;

endmodule

***********************************************************************************************************************************************************

`timescale 1ns / 1ps

//////////////////////////////////////////////////////////////////////////////////

module top(input mclk, input reset, input start, input [7:0] n, input [15:0] startaddr, output done, output [15:0] max);

wire [15:0] douta;

wire [7:0] addra;

// Instantiate HERE the fsm module

// Instantiate HERE the datapath module

//the memory module instance is as follog below:

mem imem (

.clka(mclk),

.wea(1'b0), // read

.addra(addra), // memory address

.dina(15'd0), // data in

.douta(douta)); // data out

endmodule

Explanation / Answer

/*
* C Program to Find the Largest Number in an Array
*/
#include <stdio.h>

int main()
{
int array[50], size, i, largest;
printf(" Enter the size of the array: ");
scanf("%d", &size);
printf(" Enter %d elements of the array: ", size);
for (i = 0; i < size; i++)
scanf("%d", &array[i]);
largest = array[0];
for (i = 1; i < size; i++)
{
if (largest < array[i])
largest = array[i];
}
printf(" largest element present in the given array is : %d", largest);
return 0;
}

Related Questions

Navigate

• Browse (All)
• Browse O
• Subjects

Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.