2 Figure 3.6 show, 64 KB, assuming that the oint the respective and an 8-bit dat

Question

2 Figure 3.6 show, 64 KB, assuming that the oint the respective and an 8-bit data bus to the one in the figure deactivated. The modules A0, but only the activa ws an example of a memory structure for a memory space of ming that the address bus has 16-bits, so each address word will respective cell in this space. Assume now a 20-bit address bus + data bus, together with several 64 KB memory modules similar the figure, with each module being independently activated or The modules can all share 16 lines of the address bus, say A15 to only the activated module would be accessed by the data bus. The four al lines A19 to A16 of the address bus could then be used to activate Altitio the appropriate module. What is the maximum number of modules that can be used?. If all the possible memory modules were used, what memory size would be available? Assume that only four memory modules are used. What is the effective size of the address space being used and what happens when the address words bits go from 0000xxx...xxB to 1111xxx.xxB? 1. Ik is said that each memory cell has a unique address. Considering the above item, is this an absolute truth? That is, is it possible for a memory cell to have more than one physical address? Justify your answer. A

Explanation / Answer

a. A19 - A16 can represent four bit combinations and maximum number of modules possible is 24 = 16.

b. A0 - A15 gives memory sizes of 64KB. A19 - A16 provides total of 16 memory modules of 64KB. Hence total memory size would be 16 x 64KB = 1MB memory

c. (00000000000000000000)2 / (00000)16 to (00111111111111111111)2 / (3FFFF)16

d. The address what processor generates is called LOGICAL ADDRESS and memory management unit (MMU) maps these logical addresses to PHYSICAL ADDRESS. It provides option to have multiple processes coded with the same logical addresses but located to unique different physical address. It offers portability. Cache memory scheme allows more than one physical address to same memory cell.

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