(input) +15 V 41C (output) Au o v 10 kHz -15 V AV Figure 12-8 Slew-rate measurem
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(input) +15 V 41C (output) Au o v 10 kHz -15 V AV Figure 12-8 Slew-rate measurement. Figure 12-9 Conclusion: Part 2 Questions: Part 2 1. What is the difference between the input bias current and the input offset current? 2. What is the advantage of a high value of CMRR"? Part 3: Basic Op-Amp Circuits Inverting Amplifier 1. You will use a 741C op-amp for constructing the circuits in this part. The pin diagram was given in Part 2 as Figure 12-4. (a) The schematic for the inverting amplifier is shown in Figure 12-10. Notice that l ,0 F bypass capacitors are shown on the power supply leads, these are added to avoid noise problems when working with op-amps. Note the polarities of the capacitors. Measure a 1.0 k(resistor for R,and a 10 k resistor for R,. Ryis the input resistor; R is the feedback resistor). Record the measured resistors in Table 12-8 R: 115Explanation / Answer
Part 2
Q 1. Ideally input current to Op-Amp inverting and non -inverting terminals is zero but practically a small amount of current flows into the Op-Amp input terminals. The difference between these input currents is called as input offset current and average of these two currents flowing into terminals is input bias current.
Q 2. High CMRR improves rejection capability of common inputs at Op-Amp inputs. If CMRR is very high (ideally infinite) then if equal inputs are applied to Op-Amp input terminals then output is zero. In a differential amplifier CMRR is always preferred high.
Part 3
Q 1. Closed loop gain is -Rf/Ri = -10 where - sign indicates output is 180 degree out of phase with respect to input.
Output voltage is gain times of input. Hence 500mV x 10 = 5Vpp will be the output voltage.
Since non inverting terminal is connected to ground hence voltage at pin 2 (inverting terminal) is also at ground potential. Virtual ground exist only due to infinite differential gain.
Q 2. In non inverting configuration gain is (1 + Rf/Ri). Hence gain will be (1+10) = 11.
Output voltage will be 11 times of input voltage without any phase change.
Q 3. Here Rf is 150 K where as Ri is 1K. Hence gain will be 151.
Vout is expected to be 151 time of input but Op-Amp output will get saturated at +15V to -15V. If we consider internal load drops then output of op-amp will approximately saturate at +13V to -13V.
Hence irrespective of Gain or Input voltage maximum linearity exist at output between saturation voltages / supply voltages of Op-Amp.
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