la credit per student) Det bth, 2017 he design Using the Altera Quartus II softw
ID: 2249667 • Letter: L
Question
la credit per student) Det bth, 2017 he design Using the Altera Quartus II software, desi is to be created by each student and then the design is to be entered into Quartus Ii. gn, and compile a CPLD circuit with these features: The circuit shall display your birth date on (2) 7-segment displays on the Altera programming board such that 1. The 2 displays will show your birth month as 2 digits for 1 second. (For example July will display as 07). 2. The 2 displays will then show your birth day of the month as 2 digits for I second. 3. 4. The 2 displays will blank for 2 seconds. (For example the 23rd will display as 23) The 2 displays will show your birth year as 2 digits for 1 second. (For example 1987 will display as 87). 5. This sequence will repeat. Grading will be done as follows: (max 25 points) Complete a drawing of the circuit design with no errors. Successfully compile the completed design. Find the .bdf file in your Quartus project folder and attach it to an email to rpruitt@sdccd.edu. Your email must include your first and last name.Explanation / Answer
The VHDL program is as follow
Libary ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity seven_segment is
port(clk: in std_logic;
y: out std_logic_vector (7 down 0);
sel : out std_logic_vector (3 down 0);
end seven_segment;
architecturebhv of seven_segment is type state is (state 0, state 1, state 2, state 3, state 4, state 5, state 6, state 7, state 8, state 9);
signal next_step, ps: state := state0;
begin
sel<= "1111";
process(clk, next_state);
variable i: integer:= 0;
begin
if clk' event and clk='1' then
if i <= 50000000 then
i:= i+1;
else if i > 50000000 then
i:= 0;
next_ stage <= ps;
end if
if next_stage= stage 0 then
y <= x"C0";
ps <= state 1;
else if next_state= state 1 then
y<= x"f9";
ps<= state 2;
else if next_state = state 2 then
Y<= x"a4";
ps<= state 3;
else if next_state = state 3 then
y<= x"b0";
ps <= state 4;
else next_state = state 4 then
y<= x"99";
ps <= state 5;
else if next_state = state 5 then
y<= x"92';
ps <= state 6;
else if next_state = state 6 then
y<= x"82";
ps <= state 7;
else if next_state = state 7 then
y <= x"f8";
ps <= state 8;
else if next_state = state 8 then
y<= x"80";
ps <= state 9;
else if next_state= state 9 then
y<= X"98";
ps <= state 1;
end if;
end if;
end process;
end bhv;
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