Exam 1- Computer Architecture-October 4, 2017 1. Multiply the following two deci

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Exam 1- Computer Architecture-October 4, 2017 1. Multiply the following two decimal numbers using Booth's algorithm: -17.8 x 22.4 Show all steps clearly 2a. convert the decimal number -55.43 into 32 bit single precision floating point format 2b. convert the 32 bit single precision number 01000010111010000000000000000000 to decimal Pr 3, You have some hardware that will speed up 20% of your instructions by a factor of six. Compare this to some other hardware that speeds up 15% of your instructions by a factor of eight. 4. For a given application, 30% of the instructions require memory access. Miss rate is 3%. An instruction can be executed in one clock cycle. L1 cache access time is approximately 3 clock cycles while L1 miss penalty is 70 clock cycles. Calculate the average memory access time 5. You have 4 different types of instructions [and they time they require] FP instruction require 1.2 ms memory instructions require 1.8 ms, branching instructions require 2.9 ms, and assignment instructions require 0.8 ms. a. if you have a program with 400 FP instructions, 250 memory instructions, 50 branching instructions and 49 assignment instructions. How long will this require totally? b. If you reduce the branching time to 2.0 ms, what is your speedup? Fill in the Blanks 1. You have 1024 main memory locations. Where in a cache of 16 locations would this be placed, for a direct mapping scheme? 2. There are 64 locations in cache memory. How many index bits are there? 3. Do benchmarks remain valid indefinitely? Why or why not? 4. If your L2 cache speed were 10 ns, would you expect your L1 cache speed to be 5 ns or 15 ns and why? 5. If your miss penalty doubles, what happens to the CPU execution time due to misses only?

Explanation / Answer

Solution to problem 3

benchmarks donot remain valid indefinitely. This is because there are several factors which influence the utility of a benchmark as a predictor of real time performance and some change over time.When a benchmark becomes popular, there is tremendous pressure to improve performance by adjusting the rules for running the benchmark Kernels that spend a major time on a very small section of code are particularly vulnerable.

Solution to problem 4

If my L2 cache speed is 10 ns then I would expect my L1 cache speed to be 5 ns. It takes less time to access L1 cache because it is small and accompanied by less latency as compared to L2 cache. L2 cache holds a larger pool of data and hence is accompanied by a larger latency

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