(25 points) Dynamic power requirement for CMOS chips Complementary Metal-Oxide-S

Question

(25 points) Dynamic power requirement for CMOS chips Complementary Metal-Oxide-Semiconductor (CMOS) technology is the basis for majority of modern integrated circuits (or chips) manufacturing. We will learn later in the course that the basic building block of CMOS is a very efficient switch (also known as an inverter) that draws essentially no current in either ON or OFF state. Modern battery- driven devices tend instead to be dominated by dynamic power, i.e., the power required for switching itself (when the switch goes ONOFF or OFFON) S2 R2 Sloca signal T/2 T/2 The situation can be demonstrated by a simple circuit shown. An ideal battery source Vs drives a capacitive load, C, connected via switch S1 with current flowing through resistor R1. When the switch S1 is ON, the other switch S2 is OFF. Next, the state of switches is reversed, i.e. S2 is ON and S1 is OFF, and the capacitor discharges through resistor R2 into ground. The situation repeats during each clock cycle (CPU frequency) with each switch being ON half the clock period, T. The capacitance, C, represents an unwanted and unavoidable parasitic capacitance of gates forming the chip. (Each gate on a chip performs a simple logic operation such as AND, OR, NOT, etc. There may be on the order of a hundred million gates inside a typical computer chip, so the total dynamic power dissipated may be large, even if the power per switch is small.) Find the dissipated energy in each half cycle (i.e. when S1 is ON and S2 is OFF and then when S1 is OFF and S2 is ON). Assume that both time constants R1C

Explanation / Answer

Generally cmos have one pmos

And nmos

For half cycle pmos conduct and other half

Cycle nmos conducts

Author took an rc circuit which is imitating

Cmos behavior

Power dissipation is in resistors

Say Vs=supply voltage

When swith s1 is on s2 is off

Voltage in capacitor = Vs(1-e^-t/R1C)

i=cdV/dt

Find i²R1

When switch s2 is on s1 is off

Vc=Vse^-t/R2C

Calculate I and i²R2=p2

Average power Pavg = 1/T(integral(0 to T/2)p1dt+integral(T/2 to T) p2dt)

1 Ghz = 10^9 hz

T=1/f=10^-9 sec

Pavg*10^8

IPhone may not be using cmos battery for time clock synchronisation

No It is not used by iphone

Decreasing resistance and increasing time period can reduce power consumption .

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