2. Create the sevenSegDecoder.v hd file a. Under \"Flow Navigator\" click \"Add

Question

2. Create the sevenSegDecoder.v hd file a. Under "Flow Navigator" click "Add sources." b. Select "Create or add design sources." c. Create sevenSegDecoder.vhd and then click "Finish. wide (3 downto 0) bits wide (0 to 6) (we won't be using the decimal d. Create an input vector named "sw" which is 4 bits e. Create an output vector named "seg" which is 7 point) f. Create an input named "negative" 3. In your VHDL source file sevenSegDecoder.vhd, edit it to implement the encoder you designed above .A when/else, if/else, or case statement might be helpful, you do not need to use kmaps and find each output (unless you desire the practice and headache) By looking at the Basys3's reference manual section on basic input/output (I/O), the 7 segment displays are ACTIVE LOW, meaning to turn an LED ON in our seven segment display, you need to write a 0 to it. So that means the logic is exactly inversed from our truth table. Here's the reference manual to see the explanation (include an explanation of this for your report) https://reference.digilentinc.com/basys3/refmanu al#basic io

Explanation / Answer

library ieee;

use ieee.std_logic_1164.all;

entity sevenSegDecoder is
port (sw : in std_logic_vector(3 downto 0);
seg : out std_logic_vector(6 downto 0));
end sevenSegDecoder;
architecture hex_to_seg_arch of sevenSegDecoder is
begin
with sw select
seg<= "1000000" when "0000",
"1111001" when "0001",
"0100100" when "0010",
"0110000" when "0011",
"0011001" when "0100",
"0010010" when "0101",
"0000010" when "0110",
"1111000" when "0111",
"0000000" when "1000",
"0010000" when "1001",
"0100000" when "1010",
"0000011" when "1011",
"1000110" when "1100",
"0100001" when "1101",
"0000110" when "1110",
"0001110" when "1111";
end hex_to_seg_arch;

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