The circuit below is a 4-bit register with parallel load and au asynchronous cle

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The circuit below is a 4-bit register with parallel load and au asynchronous clear capability. Modify the circuit to replace the asynchronous clear with a synchronous clear capability. Using a 4-bit synchronous counter with parallel load (see below for inputs and outputs) and a minimum number of additional gates as needed, construct a counter that counts from 0000 through 0111. Repeat for a count from 0100 through 1010. For a 4-bit ring counter, starting from an initial state of 1000. list the sequence of states of the four flip-flops after each shift. Beginning in state 10...0. how many states are there in the count sequence of an n-bit ring counter?

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