help Use the parameters VTSO = 1.5v, VTPO = -1.5v, (W/L)y = 1 mu m/1 mu m, (W/L)

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Use the parameters VTSO = 1.5v, VTPO = -1.5v, (W/L)y = 1 mu m/1 mu m, (W/L)p = 2 mum/1 mu m, VDD = 7v, k'N = 41 mu a/v2, k'p = 32 mu a/v2, 2|phi f| = 0.7v, gamma N = gamma p = 0.6V1/2, lambda N = lambda P = 0v-1. Add a nonlinear (circuit) capacitance CL(Vout) = C0[1 + (Vout/V0)]-1/2. where C0 = 4pf and V0 = 0.8v; connect it from Fout to Ground, (a) Extend the "25%-75% Method" to derive a formula for tplH, in terms of C0, Ilh, VOL, VOH, and V0. (Assume a high-to-low step input: Vin = VOH to Vm = VOL.) You must solve an ODE: CL(Vout) dVout/dt = ILH. where ILH is a (positive) constant chareine current at the 25% output logic-swing voltage V25%. (b) Numerically evaluate tPLH using your foimula from Part (a). Verify all transistor-state assumptions.

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