help Use the parameters VTNO= 1.5V, VTPO = -1.5v, (W/L)N = 1mu m/1 mu m, (W/L)P

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Use the parameters VTNO= 1.5V, VTPO = -1.5v, (W/L)N = 1mu m/1 mu m, (W/L)P = 2 mu m/1 mu m, VDD = 7v, k'N = 41 mu a/v2, k'P = 32 mu a/v2, 2|phi F| = 0.7v, gamma N = gamma P = 0.6v1/2, lambda N = lambda P = 0v-1. Add a nonlinear (circuit) capacitance CL(Vout) = C0[l + (Vout/V0)]-12, where C0 = 4pf and V0 = 0.8v; connect it from Vout to Ground, (a) Extend the "25%-75% Method" to derive a formula for tPLH, in terms of C0, ILH, VOL, VOH, and V0. (Assume a high-to-low step input: VIN = VOH to VIN = VOL ) YOU must solve an ODE: CL(Vout) dVout/dt = ILH, where ILH is a (positive) constant charging current at the 25% output logic-swing voltage V25%. (b) Numerically evaluate tPLH using your formula from Part (a). Verify all transistor-state assumptions.

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