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1. (36 points) (a) The operation of the watchdog timer is controlled by the 16-b

ID: 1834424 • Letter: 1

Question

1. (36 points)
(a) The operation of the watchdog timer is controlled by the 16-bit register WDTCTL. It is guarded against accidental writes by requiring the password WDTPW = 0x5A in the upper byte. What would happen if a value with an incorrect password is written to WDTCTL? What value would return after reading the upper byte of WDTCTL?


(b) The watchdog timer is clocked from either SMCLK (if WDTSSEL = 0), or ACLK (if WDTSSEL = 1). The WDTISx bits of the register WDTCTL select the watchdog timer interval as following multiples of the period of the chosen clock:
00: 32768
01: 8192
10: 512
11: 64
Assume that fSMCLK = 2 MHz, and fACLK = 32,768 Hz. Fill in the table with the watchdog timer intervals.


WDTSSEL WDTIS1 WDTIS0 Watchdog Timer Intervals (ms)
0 0 0 (answer here)
0 0 1 (ditto)
1 1 0 (ditto)
1 1 1 (ditto)


(c) What are the largest and smallest achievable watchdog timer intervals, assuming that fSMCLK = 2 MHz, and fACLK = 32,768 Hz?



p.s Our class is using MSP 430 and I don't know it affects the problem or not.

Explanation / Answer

I can help you out with part a, that's about it. Im not terribly good with embedded codes. The operation of the watchdog is controlled by the 16-bit register WDTCTL. It is guarded against accidental writes by requiring the password WDTPW = 0x5A in the upper byte. A reset will occur if a value with an incorrect password is written to WDTCTL. This can be done deliberately if you need to reset the chip from software. Reading WDTCTL returns 0x69 in the upper byte, so reading WDTCTL and writing the value back violates the password and causes a reset.