Use the logic gates given in the table below and draw a logic diagram for a digi

Question

Use the logic gates given in the table below and draw a logic diagram for a digital circuit with two outputs P and Q :
P( a,b,c,d,e,f) = a+ bc+ def
Q (a,b,c,d,e,f)= ( ac xor b' xor d) f ' [ please note it is ac exclusive b' exclusive d and an f NOT]
Determine the worst case throughput for your circuit. Assume that output P drives a load equivalent to one AND3 and output Q drives a load equivalent to four NOT gates.

Gate      Input Cap.(fF)         Delay tp (ns)CL in fF
NOT              5                              1 + 0.1CL
AND2            10                            2 + 0.5CL
AND3            20                            3 + 0.5CL
XOR2             10                            2 + 0.2CL
OR3               20                            3 + 0.2CL

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