It\'s an Electrical Engineering lab In the first part we define a 16 bit counter

Question

It's an Electrical Engineering lab
In the first part we define a 16 bit counter by using T-type flip flops,the counter increments its count on each positive edge of the clock if thapee Enable is asserted. The counter is reset to 0 by using the reset signal. It's all in verilog and part two (the part I'm supposed to do) builds on this, only I can't get it to work.

In part 4 we are to design and implement a circuit that displays the word HELLO, in ticker tape fashion, on the eight 7-segment displays HEX7 -0. Make the letters move from right to left in intervals of about one second.
Here's a pdf file of the lab the code is verilog and we use Quartus II software:
ftp://ftp.altera.com/up/pub/Altera_Material/10.1/Laboratory_Exercises/Digital_Logic/DE2-115/verilog/lab4_Verilog.pdf

Explanation / Answer

module FlipFlopJK(T, clock, Q,Qbar); input T, clock; output Q; reg Q; reg Qbar; always @(posedge clock) if (T == 0) Qm

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