question............ http://oi45.tinypic.com/14u87dg.jpg memory diagram ........

Question

question............ http://oi45.tinypic.com/14u87dg.jpg

memory diagram ................. http://oi49.tinypic.com/20ff4lx.jpg

Using Figure 3.21, the diagram of the 4-entry, 22-by-3-bit memory. To read from the fourth memory location, what must the values of A[1:0] and WE be? To change the number of entries in Ihe memory from 4 to 60, how many address lines would be needed? What would the addressability of the memory be after this change was made? Suppose the minimum width (in bits) of the program counter (the program counter is a special register within a CPU, and we will discuss it in detail in the next chapter) is the minimum number of bits needed to address all 60 locations in our memory from part (b) flow many additional memory locations could be added to this memory without having to alter the width of the program counter? The Concept Memory The Concept of Memory

Explanation / Answer

a> to read from fourth block, the value of A[1 0]= 0,1

and We value=0

b> to have addressability from 4 to 60 memory blocks,

we should have select 20 blocks in case of only 4 blocks,

2^4=16, 2^5=32

so we must have 5 address lines in A.

addressabality=00000 -> 11111

c>

additional memory could be added=3*32-60=36

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