According to its design specification, the timer circuit delaying the closing of

Question

According to its design specification, the timer circuit delaying the closing of an elevator door is to have a capacitance of 25 F between two points A and B when one circ itis being constructed he inexpensive but durable capacitor installed between these two points is ound to have capacitance 28.6 . To meet the specification one additional capacitor can be placed between the two points. (a) Should it be in series or in parallel with the 28.6 F capacitor? O in series in parallel (b) What should be its capacitance? c The next circuit comes down the assembly line with capacitance 24 F between A and B To meet he specification, what additional capacitor should be installed in ser es orin paralle in that circuit? magnitude orientationSelect+

Explanation / Answer

Capacitors in series add like this:
1/Cs = 1/C + 1/C ....

while capacitors in parallel add up like this:
Cp = C + C... etc.

So added caps in series lowers the the capacitance.
For (a) then it is series

b)
1/28.6 = 1/25 + 1/C2
C2 = 198.611

For (c) we need a 0.5uF capacitor to make the 25uF.

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