17. What is the minimum number of 74LS138 (3 to 8) decoders that will be needed

Question

17. What is the minimum number of 74LS138 (3 to 8) decoders that will be needed to address two external 4K word by 16 bits SRAM chips, and one 4K word by 16 bits flash memory? The two 4K word by 16 bits SRAM chips start at memory locations 0x8000 and 0xA000 and the 4K word by 16 bits flash memory starts at address 0x0000 a. C. 18. Which of the following MSP instructions is not allowed? mov.w r5, &45 a. b. mov.w #45, r) mov.w #45.0(r5) mov.wr5, #45 c. d. 19. Given the following 74LS128 address decoder with outputs of (YO not) through (Y7 not), (Yo not) goes low for which addresses (assume E=1): A11 A12 A13 SO (Isb YO S2 G1 Y4 G2 A14 A15 Y7 a, 0x3000 0x37FF b. 0x3000 0x3FFF c. 0x3800 0x3EFF d. 0x3800-0x3FFF 20. A static memory is composed of as a two-dimensional memory array of equal rows and columns. If the size of the memory is 4 Meg by1 bi how many address lines will be needed for the rows or for the columns? a. c. 16 d. 21 21. For the 8255 used in mode 0 configuration, how many total data IO lines are there ignoring the IRQ not lines and control lines) a. b. 8 c. 16 d. 24

Explanation / Answer

18. a) mov.w r5,&45

For MSP opration to enter direct value we can use #.so & not possible to enter a direct value.

21. d)24

In the 8255 total we have 40 ports but 24 lines can be used as I/O lines in mode 0 (ignoring the IRQ not lines and control lines )

the input /output feature are in 8255 in mode 0 as follows:

1.The output ports are latched ands the input ports are buffered.

2.The ports donot have hand shake or interrupt capability.

3.by using 4 ports we can get 16 combinations.

but in mode 0, by ignoring IRQ and control lines we will get 24 input and output lines.

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