Virtual Memory Question. Consider a Virtual Memory System with the following pro
ID: 3914283 • Letter: V
Question
Virtual Memory
Question. Consider a Virtual Memory System with the following properties:
48-?bit virtual address space
32-?bit physical address (4GB)
16 Kbyte pages
a) What is the total size of the Page Table, in bits, for each process on this machine, assuming that the Valid, Protection, Dirty and Use bits take a total of 4 bits and that all the virtual pages are being used?
b) The Virtual Memory system is implemented with a two-?way set associative TLB with a total of 256 entries (128 sets). Describe the Virtual Memory address organization (i.e. how the address bits are partitioned for address translation) and the process of mapping an address from the Virtual Memory space to the Physical Memory space.
Explanation / Answer
a) Our first task is to find the size of the page table. Let us understand some basics of the page table. A page table is used to store the mapping from the virtual address space to physical address space. Virtual address space is divided into several pages, and information about where these pages are stored in the physical memory is stored in the page table. So, the size of the page table entry will be the size of bits required to represent an address in the physical memory and the extra 4 bit which are given in the question.
So, size of page table entry = 32 + 4 bits = 36 bits
Page size = 16 x 210 = 214
No of pages = 248/214 = 234
Size of the page table = 234x36 bits= 9 x 233 B = 72 GB
b) Now coming to the second part, we have to show how address translation takes place using TLB.
In the virtual memory, we have 234 pages. So, So, we require 34 bits to represent a virtual page address. It is given in the question that there are 128 sets in the TLB. To uniquely identify 128 sets of the TLB, we require 7 bits. So, 7 least significant bits will be used to represent the set number and the remaining 27 bits will be used to represent the tag.
Now, let see the process of mapping an address from virtual memory space to physical memory space. Whenever the system wants to translate a given 48 virtual address to physical address. Since the first 34 bits represent page number and next 14 bits represents page offset, it extracts 34-bit page number form the address. As explained above, 7 least significant bits of the address represent the set number, it extracts 7 least significant digits and finds out the set number. Now, it goes to set the number of the TLB represented by the 7 bits and use the tag bits to find if there is a match in the two entries in the approached set. If there is a match, the physical address of the page is extracted and if there is no match, the page table is approached to get the physical address.
Related Questions
Navigate
Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.