Page up Lock 13. What is the result of arithmetic left shift operation on 110010
ID: 3904666 • Letter: P
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Page up Lock 13. What is the result of arithmetic left shift operation on 11001010 by one place? B. 11100101 D. 01100101 B. 10001010 D. 10010100 14. A computer bus consists of data lines,control lines, and power lines A address lines C. cycle lines B. protocol lines D. master/slave lines 15. At the step, PC is loaded into MAR. B, decode D. interrupt A. fetch C execute 16. Suppose a system has a byte-addressable memory size of 2GB. How many bits are required for each address? A.16 B. 31 ?. 32 D. 48 17. The register that holds the address of the data to be transferred is called the A. memory address register B. index register C. memory buffer register A Point-to-point A. 0.1 ns D. None of these is correct. B. multipoint B. 10ns 18. In computers data bus is a bus. 19. What is the clock cycle time if clock frequency is 10 GHz? C. 1 us D. 100 us 20. A computer'sspecifies the format of its instructions and the operations that the machine can perform. A. instruction set architecture (ISA) B. opcode C. addressing modes D. CPU 21. The following numbers use IEEE-32 bit floating-point format; what is the quivalent decimal value? bit biased expoeent f (-1)5x 2e-127x m (1 SmExplanation / Answer
13.Left shift is shifting of bitlocation by 1 to left and replacing the last bit with 0
GIven: 11001010
LeftShift 10010100
So the answer is D)10010100
14.A) Address lines
Computer bus contains datalines,Address ines,control lines and powerlines
15.C)Execute
MAR -memory register
PC --program counter contains next instruction which is to be executed
It loads to memory register to execute
16) B)31
2GB=2^31 =2147483648 bits =2GB data
So number of addres lines required is 31
17)A)Memory address register
MAR holds the address of the data that to be transfered
18) Multipoint
19) B)10ns seconds is the correct answer
20B) Opcode specfies the format of its
instrucions and that make the machina can perform
21Amtey)MAR register
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