Fetch Decode Exercise Example Problenm Instruction Set We will use the simplifie

Question

Fetch Decode Exercise Example Problenm Instruction Set We will use the simplified CPU and instruction set Binary Instruction RAM 0 Add 1 Subtract 2 Multiply 3 Divide Data Bus 00110021003 1004 100s 1006 0070081009 1010 1011 alue 1012 Instruction Format Saved Output CPU Output Decoder PC put in IR Put in R Put in R2 Operation Instruction Register Register 1 Register 2 Given the above set up and assuming the following program is loaded at 1001 201 321 013 126 191 Show Ram after the load And the program counter is initialized to 1001 Show the values for all registers as the program cycles through the fetch decode execute cycle

Explanation / Answer

After program load,

Program Counter (PC) : 1001

Program Counter is always store next instrustion address when executing current one.

It is simple decoder of instruction set, and use easy method different from real one.

Ofcourse, real CPU works with only binary bit with address in hex value.

First Cycle:

Next Cycle:

Next Cycle:

Next Cycle:

Next Cycle:

Next Cycle:

Address 1001 1002 1003 Value 201 321 013 Address 1004 1005 1006 Value 126 222 191 Address 1007 1008 1009 Value Address 1010 1011 1012 Value

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