Question
Match the given terns (each term used once) with the descriptions. S-bit DI 16-bit logical SP SI linear BP 8086 6-bytes paging 8088 4-bytes physical 1 M-Byte IP segmentation 64 T-Bytes 16 M-Byte ___ length of 8086 instruction pre-fetch queue ____ width of 8088 external data bus _____ size of virtual memory (Pentium processors) _____ points to next instruction to be executed _____ address produced by the segmentation system _____ Processor used primarily in IBM PCs ______ used to point to locations inside the stack _____ address type produced by the application (task) _____ addressable RAM size in the 8086 and 8088 ______ offset register used as destination in string moves ____ processor used primarily in PC clones _____ mechanism used to map the linear address onto the entire virtual memory space width of 8086 external data bus ____ defines segments through descriptors, converts logical address to linear address ____ 80286 addressable RAM capability points to the "top" of the stack ____ length of 8088 instruction pre-fetch queue ____ produced by the paging system, address type used to specify the hardware address ____ offset register used as source in string moves
Explanation / Answer
8-bits
64 T-bytes
IP
linear
8088
BP
Logical
1 M-bytes
DI
8086
Paging
16-bits
Segmentation
16 M-bytes
SP
4 bytes
Physical
SI
