Use the slides 33 - 36 of Part 1. and fill out the following table. In the table

Question

Use the slides 33 - 36 of Part 1. and fill out the following table. In the table below, Byte Addressable means that each access (using an address) to memory retrieves (or writes) one byte of memory. Similarly, two byte (or 4 byte) addressable means that every two sequence of bytes (or 4 bytes) is grouped together as one unit, so each access to memory reads/writes two (or 4) sequential bytes. Assume that the values for the "addressable memory" given in the slides is based on byte addressability. Also note that: K = 210, M = 220, G = 230

Explanation / Answer

Column 1 and column 2 is given in the slides

Column 3 is MAR size with respect to addressable memory:
         it represents how many bits are required to all the memory addresses uniqly e.g. if Addressable memory is 4GB we know that 232 = 4G, so MAR is 32 or Log2(mem size)

Column 4 is actually the copy of bus width

Intel chip Bus Width Addressable memory MAR size
(byte addressable) MAR size
(bus width addressable) 8008 8 bit 16KB 14 bits 8 bits 8080 8 bits 64KB 16 bits 8 bits 8086 16 bits 1MB 20 bits 16 bits 80386DX 32 bits 4GB 32 bits 32 bits Core i7 64 bits 64GB 36 bits 32 bits

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