1. T F The data type supported by the LC-3 ISA is 1\'s complement integers. 2. T
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Question
1. T F The data type supported by the LC-3 ISA is 1's complement integers.
2. T F For an LC-3 instruction that uses the PC-Relative addressing mode, bits [15:9] of the address of the operand are the same as bits [15:9] of the address of the instruction.
3. T F In LC-3 ISA, only BRx, JMP, JSR/JSRR, RET, and RTI instructions modify the value of the Program Counter.
4. T F TRAP instruction changes the PC to a memory address, which is part of the operating system.
5. The addressability of LC-3 memory is
a. 2^16 locations
b. 16 bits
c. 2^9 locations
d. 2^16 bits
6. The largest positive offset that can be used by an LC-3 instruction that utilizes the base+offset addressing mode is
a. 31
b. 32
c. 63
d. 64
7. Which of the following instructions move the value in R5 into R6?
i. 0001110101100000
ii. 0101110101111111
iii. 1001110101111111
a. Only i
b. Only ii
c. i and ii
d. i and iii
e. i, ii, and iii
8. If the condition codes have values N = 0, Z = 0, P = 1 at the beginning of the execution of the following sequence of instructions, what will their value be at the end of the execution of the following sequence?
Address Instruction
------- ------------------------
0x3050 0000001000000001
0x3051 0101000000100000
0x3052 0001000000100001
a. N = 0, Z = 0, P = 1
b. N = 0, Z = 1, P = 0
c. N = 1, Z = 0, P = 0
d. Cannot be determined with the information given in the question.
9. ________________ change the sequence of the instructions that are executed.
10. The LC-3 operate instructions that perform binary operations are ________ and _________
Explanation / Answer
1. Ans: False.
It uses 2's complememnt.
2. yes, For an LC-3 instruction that uses the PC-Relative addressing mode, bits [15:9] of the address of the operand are the same as bits [15:9] of the address of the instruction
Ans: True.
3. In LC-3 ISA, only BRx, JMP, JSR/JSRR, RET, and RTI instructions modify the value of the Program Counter
Ans: True
4. TRAP instruction changes the PC to a memory address, which is part of the operating system.
Ans: false
5. The addressability of LC-3 memory is 16 bits per register.
Ans: b. 16 bits.
6. Ans: 31
7. Ans: D. 1 and 3.
8.
x3050 0000 0010 0000 0010 -> BRp #2
x3051 0101 0000 0010 0000 -> does not execute
x3052 0000 1110 0000 0010 -> does not execute
Hnece, Ans: N = 1, Z = 0, P = 0
9. control instruction
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