The basic single-cycle MIPS implementation can only implement a few instructions
ID: 3825285 • Letter: T
Question
The basic single-cycle MIPS implementation can only implement a few instructions. New instructions can be added to an existing ISA, often by reusing existing hardware. For the following instructions, answer the following questions to explain how to add them to the single-cycle architecture. You may wish to draw your modifications on the ISA diagram as well. Which existing blocks (if any) can be used for this instruction? How will the existing blocks be used to support this instruction? What new or modified hardware (if any) do we need for this instruction? What new signals (if any) do we need from the control unit to support this instruction?Explanation / Answer
Ans:
1.
Existings blocks which can be used are
a. Uses the instruction memory, both existing read ports of Registers, the ALU, and the write port of the Registers.
b. Uses the instruction memory - one of the read ports of the registers, the path that passed the immediate to the ALU and the write port of the registers.
2.By this way existing blocks can be used to support the instruction
The new forwarding unit have to control two Muxes placed right before the branch comparator.Every Mux selects between value read from registers, the ALU output from the EX/MEM pipeline register,and data value from the MEM/WB pipeline register.The complexity of the new forwarding unit is the same as the complexity of the existing one.
3.
For that instruction there is no modified hardware
4.
-->You need a control signal that tells the new ALU what to do if you extended the Existing ALU you need to add a new ADD3 operation.
--> You need to change the ALU operation control signals to support the added SLL operation in the ALU.
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